I2C Protocol Subtleties – Aspect 1

This write-up is the first in a collection describing the much more ‘subtle’ elements of the I2C Protocol, initially developed by Philips.

Considering the fact that you might be looking at this collection, I am assuming you previously know what the I2C bus is, and you happen to be searching to avoid some pain when you need to have to use it in a task. If so, you have arrive to the right spot. If not, I will be including some introductory I2C details shortly at my site.

Just so we’re crystal clear, this collection will not consist of coverage of the Substantial-pace mode, as this is considerably diverse from the style and habits of the typical 2-wire shared-bus implementation, and is also not that commonly used. You will find lots of great reference content obtainable on the World wide web that addresses this mode.

Here’s a speedy list of what will be coated in the relaxation of the series:

  • lacking Begin
  • missing Stop
  • Repeated Start out
  • lacking data bits
  • lacking ACK/NAK
  • knowledge immediately after NAK
  • again-to-back glitches
  • pullup resistors
  • bus repeaters
  • implementation applying a total-components TWI or I2C peripheral
  • implementation working with a USI peripheral
  • implementation utilizing a USART peripheral
  • SMBus distinctions from I2C

Now, on to the excellent things!

For this write-up, we will target on the 3 types of implementations you may find in designs these days: total hardware, components/computer software blend, and whole computer software (or ‘bit-bang’ as it is often identified as).

Many microcontrollers these days, even some lower-conclusion devices, include a completely-components I2C peripheral. Atmel refers to theirs as TWI, Microchip phone calls theirs I2C other sellers use identical naming. When making use of a absolutely-hardware method, it is in fact difficult to produce any form of bus error unless you misunderstand how the peripheral is effective or what a correct I2C bus sequence really should look like. In general, although, this technique calls for the minimum in-depth comprehension of the protocol alone.

The USI peripheral discovered in some Atmel units is a negligible-hardware layout that relies upon on program conversation to make it a complete implementation. This adaptable peripheral can truly be utilised for I2C, SPI and UART configurations, and is proper for very low-conclude gadgets wherever introducing all a few peripherals would be charge-prohibitive. Whilst it necessitates more coding than a TWI or comprehensive-hardware I2C peripheral, it is in some techniques additional adaptable. This technique requres a a lot more in-depth comprehending of the protocol, as you are responsible for moving from one particular point out to the upcoming, and it is possible to go in the completely wrong direction.

And lastly, implementing a 100% software package method demands a whole comprehension of the I2C protocol. Nearly each microcontroller vendor presents application notes and code examples for developing an I2C Grasp device applying a pure-computer software remedy. Compared with a UART, I2C is a clocked (rather than timed) protocol, so interruptions in the execution of the protocol are tolerated nicely, letting interrupts to be serviced devoid of issue for shedding info. The maximum pace of the application-primarily based answer is finally established by the CPU clock velocity, and ordinarily a Learn implementation can effortlessly reach the 400KHz rate.

A program-centered implementation of a Slave product is substantially much more complicated. Without hardware aid, the software ought to keep track of both the SDA and the SCL traces simultaneously in buy to detect clock edges and know positively the condition of the SDA line prior to the rise or slide of SCL. Detection of a Start off or Cease affliction will typically demand the use of interrupts, usually the software package would require to be 100% eaten with checking SCL and SDA. Software-based mostly Slave implementations tend to be CPU-certain, demanding many MIPS to attain even 100KHz operation. As a result, genuine software program-only Slave implementations might not even exist for some microcontroller family members, and some others could not be able of reaching comprehensive 100KHz bus velocity.

With this hardware and application foundation acquiring been laid, we will dive further into the protocol by itself in our up coming posting. Thanks for looking at!

(Copyright 2010 Robert G. Fries)